2544 search results - page 38 / 509 » Process pipeline scheduling |
CGO
2004
IEEE
15 years 1 months ago
2004
IEEE
Traditionally, software pipelining is applied either to the innermost loop of a given loop nest or from the innermost loop to the outer loops. In a companion paper, we proposed a ...
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EUROPAR
2010
Springer
14 years 10 months ago
2010
Springer
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
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WIOPT
2010
IEEE
14 years 8 months ago
2010
IEEE
—Self-organizing networks (SON) is commonly seen as a way to increase network performance while simplifying its management. This paper investigates Packet Scheduling (PS) in the ...
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
The performance requirements for contemporary microprocessors are increasing as rapidly as their number of applications grows. By accelerating the clock, performance can be gained...
FPL
2003
Springer
15 years 2 months ago
2003
Springer
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...