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IPPS
2009
IEEE
15 years 6 months ago
Building a parallel pipelined external memory algorithm library
Large and fast hard disks for little money have enabled the processing of huge amounts of data on a single machine. For this purpose, the well-established STXXL library provides a...
Andreas Beckmann, Roman Dementiev, Johannes Single...
92
Voted
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
15 years 5 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
GLVLSI
2003
IEEE
152views VLSI» more  GLVLSI 2003»
15 years 5 months ago
Dynamic single-rail self-timed logic structures for power efficient synchronous pipelined designs
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
Frank Grassert, Dirk Timmermann
IPPS
2002
IEEE
15 years 4 months ago
Efficient Pipelining of Nested Loops: Unroll-and-Squash
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
Darin Petkov, Randolph E. Harr, Saman P. Amarasing...
JUCS
2007
108views more  JUCS 2007»
14 years 11 months ago
On Pipelining Sequences of Data-Dependent Loops
: Sequences of data-dependent tasks, each one traversing large data sets, exist in many applications (such as video, image and signal processing applications). Those tasks usually ...
Rui Rodrigues, João M. P. Cardoso