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ARVLSI
1997
IEEE
104views VLSI» more  ARVLSI 1997»
15 years 4 months ago
A High-Speed Asynchronous Decompression Circuit for Embedded Processors
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...
Martin Benes, Andrew Wolfe, Steven M. Nowick
ICS
1998
Tsinghua U.
15 years 4 months ago
Load Execution Latency Reduction
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
Bryan Black, Brian Mueller, Stephanie Postal, Ryan...
SAFECOMP
1998
Springer
15 years 4 months ago
An Agenda for Specifying Software Components with Complex Data Models
Abstract. We present a method to specify software for a special kind of safetycritical embedded systems, where sensors deliver low-level values that must be abstracted and pre-proc...
Kirsten Winter, Thomas Santen, Maritta Heisel
COSIT
1997
Springer
143views GIS» more  COSIT 1997»
15 years 4 months ago
Using Hierarchical Spatial Data Structures for Hierarchical Spatial Reasoning
This paper gives a definition of Hierarchical Spatial Reasoning, which computes increasingly better results in a hierarchical fashion and stops the computation when a result is ac...
Sabine Timpf, Andrew U. Frank
ICSE
1997
IEEE-ACM
15 years 4 months ago
Visualizing Interactions in Program Executions
Implementing, validating, modifying, or reengineering an object-oriented system requires an understanding of the object and class interactions which occur as a program executes. T...
Dean F. Jerding, John T. Stasko, Thomas Ball