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SIMPRA
2008
137views more  SIMPRA 2008»
15 years 3 months ago
An admissible-behaviour-based analysis of the deadlock in Petri-net controllers
This paper addresses the problem of verifying the discrete control logic that is typically implemented by programmable controllers. Not only are the logical properties of the cont...
G. Music, Drago Matko
ASPDAC
2010
ACM
143views Hardware» more  ASPDAC 2010»
15 years 2 months ago
A low latency wormhole router for asynchronous on-chip networks
Asynchronous on-chip networks are power efficient and tolerant to process variation but they are slower than synchronous on-chip networks. A low latency asynchronous wormhole route...
Wei Song, Doug Edwards
ERSA
2009
147views Hardware» more  ERSA 2009»
15 years 1 months ago
Fault Avoidance in Medium-Grain Reconfigurable Hardware Architectures
Medium-grain reconfigurable hardware (MGRH) architectures represent a hybrid between the versatility of a field programmable gate array (FPGA) and the computational power of a cust...
Kylan Robinson, José G. Delgado-Frias
CORR
2010
Springer
79views Education» more  CORR 2010»
15 years 20 days ago
Probabilistic cellular automata, invariant measures, and perfect sampling
In a probabilistic cellular automaton (PCA), the cells are updated synchronously and independently, according to a distribution depending on a finite neighborhood. A PCA can be vi...
Ana Busic, Jean Mairesse, Irene Marcovici
ISCAS
2011
IEEE
210views Hardware» more  ISCAS 2011»
14 years 7 months ago
A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test
—A method of precise measurement of on-chip analog voltages in a mostly-digital manner, with minimal overhead, is presented. A pair of clock signals is routed to the node of an a...
Rajath Vasudevamurthy, Pratap Kumar Das, Bharadwaj...