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» Processing-in-Memory: Exploring the Design Space
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116
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CODES
2004
IEEE
15 years 4 months ago
Power-aware communication optimization for networks-on-chips with voltage scalable links
Networks-on-Chip (NoC) is emerging as a practical development platform for future systems-on-chip products. We propose an energyefficient static algorithm which optimizes the ener...
Dongkun Shin, Jihong Kim
78
Voted
CODES
2008
IEEE
15 years 2 months ago
A performance-oriented hardware/software partitioning for datapath applications
This article proposes a hardware/software partitioning method targeted to performance-constrained systems for datapath applications. Exploiting a platform based design, a Timed Pe...
Laura Frigerio, Fabio Salice
100
Voted
WCE
2007
15 years 1 months ago
Local Approximation of Pareto Surface
—In the design process of complex systems, the designer is solving an optimization problem, which involves different disciplines and where all design criteria have to be optimize...
S. V. Utyuzhnikov, Jeremy Maginot, Marin D. Guenov
112
Voted
CSREAESA
2009
15 years 1 months ago
Application of Embedded Systems in Low Earth Orbit for Measurement of Ionospheric Anomalies
: Space is a hazardous environment for both man and machine and to explore such a terrain a rugged, yet easily implementable, platform is needed. Low-cost, low-power embedded syste...
George J. Starr, J. M. Wersinger, Richard Chapman,...
ASC
2008
15 years 26 days ago
Dynamic data assigning assessment clustering of streaming data
: Discovering interesting patterns or substructures in data streams is an important challenge in data mining. Clustering algorithms are very often applied to identify single substr...
Olga Georgieva, Frank Klawonn