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» Processing-in-Memory: Exploring the Design Space
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CVPR
2011
IEEE
14 years 8 months ago
Multicore Bundle Adjustment
We present the design and implementation of new inexact Newton type Bundle Adjustment algorithms that exploit hardware parallelism for efficiently solving large scale 3D scene re...
Changchang Wu, Sameer Agarwal, Brian Curless, Stev...
111
Voted
ICCAD
1998
IEEE
120views Hardware» more  ICCAD 1998»
15 years 5 months ago
Communication synthesis for distributed embedded systems
Designers of distributed embedded systems face many challenges in determining the appropriate tradeoffs to make when defining a system architecture or retargeting an existing desi...
Ross B. Ortega, Gaetano Borriello
FPGA
2010
ACM
181views FPGA» more  FPGA 2010»
15 years 4 months ago
Efficient multi-ported memories for FPGAs
Multi-ported memories are challenging to implement with FPGAs since the provided block RAMs typically have only two ports. We present a thorough exploration of the design space of...
Charles Eric LaForest, J. Gregory Steffan
CDES
2006
184views Hardware» more  CDES 2006»
15 years 2 months ago
Compilation for Future Nanocomputer Architectures
Compilation has a long history of translating a programmer's human-readable code into machine instructions designed to make good use of a specific target computer. In this pa...
Thomas P. Way
111
Voted
SIGCSE
2010
ACM
203views Education» more  SIGCSE 2010»
15 years 26 days ago
An approach to integrating ICTD projects into an undergraduate curriculum
Applying information and communication technologies to development (ICTD) is emerging as an interesting and motivating research area in computer science and engineering. It spans ...
Richard J. Anderson, Ruth E. Anderson, Gaetano Bor...