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» Processing-in-Memory: Exploring the Design Space
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VIS
2007
IEEE
181views Visualization» more  VIS 2007»
15 years 11 months ago
Shadow-Driven 4D Haptic Visualization
Just as we can work with two-dimensional floor plans to communicate 3D architectural design, we can exploit reduced-dimension shadows to manipulate the higher-dimensional objects ...
Hui Zhang, Andrew J. Hanson
MICRO
2009
IEEE
124views Hardware» more  MICRO 2009»
15 years 5 months ago
ZerehCache: armoring cache architectures in high defect density technologies
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
CASES
2006
ACM
15 years 4 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
HUC
2003
Springer
15 years 3 months ago
Finding a Place for UbiComp in the Home
The movement of design out of the workplace and into the home brings with it the need to develop new analytic concepts to consider how ubiquitous computing might relate to and supp...
Andy Crabtree, Tom Rodden, Terry Hemmings, Steve B...
AFRIGRAPH
2004
ACM
15 years 3 months ago
Visualizing 3D scenes using non-linear projections and data mining of previous camera movements
We describe techniques for exploring 3D scenes by combining non-linear projections with the interactive data mining of camera navigations from previous explorations. Our approach ...
Karan Singh, Ravin Balakrishnan