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» Processing-in-Memory: Exploring the Design Space
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IV
2003
IEEE
118views Visualization» more  IV 2003»
15 years 3 months ago
Tools for Visual Comparison of Spatial Development Scenarios
In the paper, we suggest a set of visualization-based exploratory tools to support analysis and comparison of different spatial development scenarios, such as results of simulatio...
Natalia V. Andrienko, Gennady L. Andrienko, Peter ...
FPL
2003
Springer
95views Hardware» more  FPL 2003»
15 years 3 months ago
A Model for Hardware Realization of Kernel Loops
Abstract. Hardware realization of kernel loops holds the promise of accelerating the overall application performance and is therefore an important part of the synthesis process. In...
Jirong Liao, Weng-Fai Wong, Tulika Mitra
IPPS
2002
IEEE
15 years 3 months ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
ISCA
2002
IEEE
123views Hardware» more  ISCA 2002»
15 years 3 months ago
Going the Distance for TLB Prefetching: An Application-Driven Study
The importance of the Translation Lookaside Buffer (TLB) on system performance is well known. There have been numerous prior efforts addressing TLB design issues for cutting down ...
Gokul B. Kandiraju, Anand Sivasubramaniam
ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
15 years 3 months ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha