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ASPDAC
2005
ACM
100views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Microarchitecture evaluation with floorplanning and interconnect pipelining
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
Ashok Jagannathan, Hannah Honghua Yang, Kris Konig...
ECBS
1999
IEEE
138views Hardware» more  ECBS 1999»
15 years 2 months ago
Multi-Domain Surety Modeling and Analysis for High Assurance Systems
Engineering systems are becoming increasingly complex as state of the art technologies are incorporated into designs. Surety modeling and analysis is an emerging science which per...
James Davis, Jason Scott, Janos Sztipanovits, Marc...
VLSID
2004
IEEE
114views VLSI» more  VLSID 2004»
15 years 10 months ago
High-Speed Optoelectronics Receivers in SiGe
This paper focuses on the investigation of integrated CMOS and Silicon/Germanium (SiGe) devices for highspeed optical receiver circuits. In this paper, we present several competit...
Amit Gupta, Steven P. Levitan, Leo Selavo, Donald ...
DOLAP
2005
ACM
14 years 11 months ago
Applying MDA to the development of data warehouses
Different modeling approaches have been proposed to overcome every design pitfall of the development of the different parts of a data warehouse (DW) system. However, they are all ...
Jose-Norberto Mazón, Juan Trujillo, Manuel ...
TVLSI
2008
152views more  TVLSI 2008»
14 years 9 months ago
MMV: A Metamodeling Based Microprocessor Validation Environment
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Di...