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GLVLSI
2006
IEEE
115views VLSI» more  GLVLSI 2006»
15 years 3 months ago
Yield enhancement of asynchronous logic circuits through 3-dimensional integration technology
This paper presents a systematic design methodology for yield enhancement of asynchronous logic circuits using 3-D (3-Dimensional) integration technology. In this design, the targ...
Song Peng, Rajit Manohar
DAC
1999
ACM
15 years 10 months ago
Converting a 64b PowerPC Processor from CMOS Bulk to SOI Technology
A 550MHz 64b PowerPC processor was developed for fabrication in Silicon-On-Insulator (SOI) technology from a processor previously designed and fabricated in bulk CMOS [1]. Both th...
D. Allen, D. Behrends, B. Stanisic
IE
2007
14 years 11 months ago
Observing the learning curve of videogames in architectural design
This paper presents innovative research into the use of videogame environments within architectural design studios. In this context, 3D videogame environments encourage new unders...
Greg More, Andrew Burrow
DAC
2004
ACM
15 years 3 months ago
Low voltage swing logic circuits for a Pentium 4 processor integer core
The Pentium® 4 processor architecture uses a 2x frequency core clock[1] to implement low latency integer ops. Low Voltage Swing logic circuits implemented in 90nm technology[2] m...
Daniel J. Deleganes, Micah Barany, George Geannopo...
ICCAD
2007
IEEE
128views Hardware» more  ICCAD 2007»
15 years 6 months ago
Module assignment for pin-limited designs under the stacked-Vdd paradigm
Abstract— This paper addresses the module assignment problem in pinlimited designs under the stacked-Vdd circuit paradigm. A partition-based algorithm is presented for efficient...
Yong Zhan, Tianpei Zhang, Sachin S. Sapatnekar