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SAC
2004
ACM
15 years 3 months ago
DSPxPlore: design space exploration methodology for an embedded DSP core
High mask and production costs for the newest CMOS silicon technologies increase the pressure to develop hardware platforms useable for different applications or variants of the s...
Christian Panis, Ulrich Hirnschrott, Gunther Laure...
CSCW
2008
ACM
14 years 10 months ago
Physical and Digital Artifact-Mediated Coordination in Building Design
We conducted an ethnographic field study examining how a building design team used representational artifacts to coordinate the design of building systems, structure, and architect...
Melanie Tory, Sheryl Staub-French, Barry A. Po, Fu...
WWW
2008
ACM
15 years 10 months ago
Using graphics processors for high-performance IR query processing
Web search engines are facing formidable performance challenges due to data sizes and query loads. The major engines have to process tens of thousands of queries per second over t...
Shuai Ding, Jinru He, Hao Yan, Torsten Suel
DATE
2005
IEEE
104views Hardware» more  DATE 2005»
15 years 3 months ago
Queue Management in Network Processors
: - One of the main bottlenecks when designing a network processing system is very often its memory subsystem. This is mainly due to the state-of-the-art network links operating at...
Ioannis Papaefstathiou, Theofanis Orphanoudakis, G...
TPDS
1998
129views more  TPDS 1998»
14 years 9 months ago
The Offset Cube: A Three-Dimensional Multicomputer Network Topology Using Through-Wafer Optics
—Three-dimensional packaging technologies are critical for enabling ultra-compact, massively parallel processors (MPPs) for embedded applications. Through-wafer optical interconn...
W. Stephen Lacy, José Cruz-Rivera, D. Scott...