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» Processor Architectures for Ontogenesis
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MICRO
2006
IEEE
115views Hardware» more  MICRO 2006»
16 years 4 days ago
Mitigating the Impact of Process Variations on Processor Register Files and Execution Units
Design variability due to die-to-die and within-die process variations has the potential to significantly reduce the maximum operating frequency and the effective yield of high-p...
Xiaoyao Liang, David Brooks
271
Voted
LCTRTS
2005
Springer
15 years 11 months ago
Generation of permutations for SIMD processors
Short vector (SIMD) instructions are useful in signal processing, multimedia, and scientific applications. They offer higher performance, lower energy consumption, and better res...
Alexei Kudriavtsev, Peter M. Kogge
188
Voted
MICAI
2004
Springer
15 years 11 months ago
A Biologically Motivated and Computationally Efficient Natural Language Processor
Abstract. Conventional artificial neural network models lack many physiological properties of the neuron. Current learning algorithms are more concerned to computational performanc...
João Luís Garcia Rosa
128
Voted
HOTOS
2003
IEEE
15 years 11 months ago
Certifying Program Execution with Secure Processors
Cerium is a trusted computing architecture that protects a program’s execution from being tampered while the program is running. Cerium uses a physically tamperresistant CPU and...
Benjie Chen, Robert Morris
DATE
2002
IEEE
104views Hardware» more  DATE 2002»
15 years 11 months ago
Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors
In this paper, we suggest hardware-assisted data compression as a tool for reducing energy consumption of core-based embedded systems. We propose a novel and e cient architecture ...
Luca Benini, Davide Bruni, Alberto Macii, Enrico M...