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» Processor Architectures for Ontogenesis
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PLDI
1999
ACM
15 years 10 months ago
Enhanced Code Compression for Embedded RISC Processors
This paper explores compiler techniques for reducing the memory needed to load and run program executables. In embedded systems, where economic incentives to reduce both ram and r...
Keith D. Cooper, Nathaniel McIntosh
FMCAD
1998
Springer
15 years 10 months ago
Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
Sergey Berezin, Armin Biere, Edmund M. Clarke, Yun...
MTV
2005
IEEE
100views Hardware» more  MTV 2005»
15 years 11 months ago
A Study of Architecture Description Languages from a Model-based Perspective
Abstract— Owing to the recent trend of using applicationspecific instruction-set processors (ASIP), many Architecture Description Languages (ADLs) have been created. They specif...
Wei Qin, Sharad Malik
VL
1994
IEEE
159views Visual Languages» more  VL 1994»
15 years 10 months ago
Concepts and Architecture of Vista - a Multiparadigm Programming Environment
This paper describes Vista, a visual multiparadigm programming environment. We introduce the notion of processors and networks and discuss their application in the construction of...
Stefan Schiffer, Joachim Hans Fröhlich
JPDC
2006
141views more  JPDC 2006»
15 years 6 months ago
M-TREE: A high efficiency security architecture for protecting integrity and privacy of software
Secure processor architectures enable new sets of applications such as commercial grid computing, software copy protection and secure mobile agents by providing secure computing e...
Chenghuai Lu, Tao Zhang, Weidong Shi, Hsien-Hsin S...