Sciweavers

2700 search results - page 174 / 540
» Processor Architectures for Ontogenesis
Sort
View
DATE
2004
IEEE
157views Hardware» more  DATE 2004»
15 years 10 months ago
A Configurable Logic Architecture for Dynamic Hardware/Software Partitioning
In previous work, we showed the benefits and feasibility of having a processor dynamically partition its executing software such that critical software kernels are transparently p...
Roman L. Lysecky, Frank Vahid
ICIP
2000
IEEE
16 years 7 months ago
Performance Analysis of an H.263 Video Encoder for VIRAM
VIRAM (Vector Intelligent Random Access Memory) is a vector architecture processor with embedded memory, designed for portable multimedia processing devices. Its vector processing...
Thinh P. Q. Nguyen, Avideh Zakhor, Katherine A. Ye...
IPPS
2000
IEEE
15 years 10 months ago
Support for Recoverable Memory in the Distributed Virtual Communication Machine
The Distributed Virtual Communication Machine (DVCM) is a software communication architecture for clusters of workstations equipped with programmable network interfaces (NIs) for ...
Marcel-Catalin Rosu, Karsten Schwan
ASPLOS
1996
ACM
15 years 10 months ago
The Case for a Single-Chip Multiprocessor
Advances in IC processing allow for more microprocessor design options. The increasing gate density and cost of wires in advanced integrated circuit technologies require that we l...
Kunle Olukotun, Basem A. Nayfeh, Lance Hammond, Ke...
PLDI
2011
ACM
14 years 9 months ago
Understanding POWER multiprocessors
Exploiting today’s multiprocessors requires highperformance and correct concurrent systems code (optimising compilers, language runtimes, OS kernels, etc.), which in turn requir...
Susmit Sarkar, Peter Sewell, Jade Alglave, Luc Mar...