2700 search results - page 177 / 540 » Processor Architectures for Ontogenesis |
262
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POPL
2007
ACM
16 years 6 months ago
2007
ACM
The predominant thread-based approach to concurrent programming is bug-prone, difficult to reason about, and does not scale well to large numbers of processors. Sieves provide a s...
123
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FPL
2007
Springer
16 years 12 days ago
2007
Springer
This paper describes the mapping of a two-dimensional inverse discrete cosine transform (2-D IDCT) onto a wordlevel reconfigurable Montium R processor. This shows that the IDCT i...
146
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APCSAC
2006
IEEE
16 years 9 days ago
2006
IEEE
The systolic array paradigm has low communication demand because it does not use costly global communication and each processor communicates with few other processors. It is thus s...
139
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GECCO
2003
Springer
15 years 11 months ago
2003
Springer
Power consumption and portability issues are becoming increasingly significant in embedded system architectures. Therefore, it is important that chip architects and integrated circ...
158
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ISCA
1989
IEEE
15 years 10 months ago
1989
IEEE
: We explore the question: “What can a von Neumann processor borrow from dataflow to make it more suitable for a multiprocessor?’’ Starting with a simple, “RISC-like” ins...