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» Processor Architectures for Ontogenesis
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SAMOS
2005
Springer
15 years 11 months ago
Sandbridge Software Tools
—We describe the generation of the simulation environment for the Sandbridge Sandblaster multithreaded processor. The processor model is described using the Sandblaster architect...
C. John Glossner, Sean Dorward, Sanjay Jinturkar, ...
IPPS
2000
IEEE
15 years 10 months ago
ClusterNet: An Object-Oriented Cluster Network
Abstract. Parallel processing is based on utilizing a group of processors to efficiently solve large problems faster than is possible on a single processor. To accomplish this, the...
Raymond Hoare
ISSS
1995
IEEE
100views Hardware» more  ISSS 1995»
15 years 9 months ago
Power analysis and low-power scheduling techniques for embedded DSP software
This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been dev...
Mike Tien-Chien Lee, Vivek Tiwari, Sharad Malik, M...
DAC
2009
ACM
16 years 7 months ago
Online cache state dumping for processor debug
Post-silicon processor debugging is frequently carried out in a loop consisting of several iterations of the following two key steps: (i) processor execution for some duration, fo...
Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishna...
VLSID
2008
IEEE
150views VLSI» more  VLSID 2008»
16 years 6 months ago
PTSMT: A Tool for Cross-Level Power, Performance, and Thermal Exploration of SMT Processors
Simultaneous Multi-Threading (SMT) processors are becoming popular because they exploit both instruction-level and threadlevel parallelism by issuing instructions from different t...
Deepa Kannan, Aseem Gupta, Aviral Shrivastava, Nik...