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» Processor Architectures for Ontogenesis
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HPCA
2003
IEEE
16 years 6 months ago
Control Techniques to Eliminate Voltage Emergencies in High Performance Processors
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
Russ Joseph, David Brooks, Margaret Martonosi
171
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HPCA
2002
IEEE
16 years 6 months ago
Exploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay
Cache memories account for a significant fraction of a chip's overall energy dissipation. Recent research advocates using "resizable" caches to exploit cache requir...
Se-Hyun Yang, Michael D. Powell, Babak Falsafi, T....
ICCAD
2006
IEEE
177views Hardware» more  ICCAD 2006»
16 years 3 months ago
Application-specific customization of parameterized FPGA soft-core processors
Soft-core microprocessors mapped onto field-programmable gate arrays (FPGAs) represent an increasingly common embedded software implementation option. Modern FPGA soft-cores are p...
David Sheldon, Rakesh Kumar, Roman L. Lysecky, Fra...
IPPS
2008
IEEE
16 years 21 days ago
High-speed string searching against large dictionaries on the Cell/B.E. Processor
Our digital universe is growing, creating exploding amounts of data which need to be searched, protected and filtered. String searching is at the core of the tools we use to curb...
Daniele Paolo Scarpazza, Oreste Villa, Fabrizio Pe...
SBACPAD
2008
IEEE
100views Hardware» more  SBACPAD 2008»
16 years 20 days ago
Selection of the Register File Size and the Resource Allocation Policy on SMT Processors
The performance impact of the Physical Register File (PRF) size on Simultaneous Multithreading processors has not been extensively studied in spite of being a critical shared reso...
Jesús Alastruey, Teresa Monreal, Francisco ...