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» Processor Architectures for Ontogenesis
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ISCA
2002
IEEE
115views Hardware» more  ISCA 2002»
15 years 11 months ago
ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors
This paper presents ReVive, a novel general-purpose rollback recovery mechanism for shared-memory multiprocessors. ReVive carefully balances the conflicting requirements of avail...
Milos Prvulovic, Josep Torrellas, Zheng Zhang
IPPS
2000
IEEE
15 years 10 months ago
Augmenting Modern Superscalar Architectures with Configurable Extended Instructions
The instruction sets of general-purpose microprocessors are designed to offer good performance across a wide range of programs. The size and complexity of the instruction sets, how...
Xianfeng Zhou, Margaret Martonosi
ISCA
1997
IEEE
113views Hardware» more  ISCA 1997»
15 years 10 months ago
Effects of Communication Latency, Overhead, and Bandwidth in a Cluster Architecture
This work provides a systematic study of the impact of communication performance on parallelapplications in a high performance network of workstations. We develop an experimental ...
Richard P. Martin, Amin Vahdat, David E. Culler, T...
ASPLOS
2006
ACM
15 years 10 months ago
Instruction scheduling for a tiled dataflow architecture
This paper explores hierarchical instruction scheduling for a tiled processor. Our results show that at the top level of the hierarchy, a simple profile-driven algorithm effective...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
IJNSEC
2007
137views more  IJNSEC 2007»
15 years 6 months ago
An FPGA-based AES-CCM Crypto Core For IEEE 802.11i Architecture
The widespread adoption of IEEE 802.11 wireless networks has brought its security paradigm under active research. One of the important research areas in this field is the realiza...
Arshad Aziz, Nassar Ikram