2700 search results - page 282 / 540 » Processor Architectures for Ontogenesis |
162
Voted
IPPS
2002
IEEE
15 years 11 months ago
2002
IEEE
In this paper we present new approaches to high performance protein database scanning on two novel massively parallel architectures to gain supercomputer power at low cost. The ï¬...
145
Voted
IPPS
2000
IEEE
15 years 10 months ago
2000
IEEE
As processor speeds rapidly approach the Giga-Hertz regime, the disparity between process time and memory access time plays an increasing role in the overall limitation of processo...
143
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ASYNC
1999
IEEE
15 years 10 months ago
1999
IEEE
This paper describes an investigation of potential advantages and risks of applying an aggressive asynchronous design methodology to Intel Architecture. RAPPID ("Revolving As...
142
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SPLST
2003
15 years 7 months ago
2003
Abstract. In this paper we present an all-optical network architecture and a systolic routing protocol for it. The sparse optical torus network consists of an n×n torus, where pro...
158
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FUIN
2007
15 years 6 months ago
2007
We present the development of a theory of stored threads and their execution. The work builds upon Maurer’s theory of computer instructions and the thread algebra of Bergstra et ...