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» Processor Architectures for Ontogenesis
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SLIP
2003
ACM
15 years 7 months ago
A hierarchical three-way interconnect architecture for hexagonal processors
The problem of interconnect architecture arises when an array of processors needs to be integrated on one chip. With the deep sub-micron technology, devices become cheap while wir...
Feng Zhou, Esther Y. Cheng, Bo Yao, Chung-Kuan Che...
VLSID
2003
IEEE
110views VLSI» more  VLSID 2003»
16 years 2 months ago
A New Reactive Processor with Architectural Support for Control Dominated Embedded Systems
Control dominated embedded systems have to be designed for fast reaction to asynchronous external events occurring in the environment. Such systems must be able to perform signal ...
Partha S. Roop, Zoran A. Salcic, Morteza Biglari-A...
ARCS
2004
Springer
15 years 7 months ago
Cryptonite - A Programmable Crypto Processor Architecture for High-Bandwidth Applications
Cryptographic methods are widely used within networking and digital rights management. Numerous algorithms exist, e.g. spanning VPNs or distributing sensitive data over a shared ne...
Rainer Buchty, Nevin Heintze, Dino Oliva
JUCS
2007
122views more  JUCS 2007»
15 years 1 months ago
A New Architecture for Concurrent Lazy Cyclic Reference Counting on Multi-Processor Systems
: Multi-processor systems have become the standard in current computer architectures. Software developers have the possibility to take advantage of the additional computing power a...
Andrei de Araújo Formiga, Rafael Dueire Lin...
ARITH
2005
IEEE
15 years 7 months ago
The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor
The floating-point unit in the Synergistic Processor Element of the 1st generation multi-core CELL Processor is described. The FPU supports 4-way SIMD single precision and intege...
Silvia M. Müller, Christian Jacobi 0002, Hwa-...