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» Processor Architectures for Ontogenesis
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128
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CAL
2007
15 years 5 months ago
Nahalal: Cache Organization for Chip Multiprocessors
— This paper addresses cache organization in Chip Multiprocessors (CMPs). We show that in CMP systems it is valuable to distinguish between shared data, which is accessed by mult...
Zvika Guz, Idit Keidar, Avinoam Kolodny, Uri C. We...
122
Voted
IEICET
2006
84views more  IEICET 2006»
15 years 5 months ago
How to Maximize Software Performance of Symmetric Primitives on Pentium III and 4
Abstract. This paper discusses the state-of-the-art software optimization methodology for symmetric cryptographic primitives on Pentium III and 4 processors. We aim at maximizing s...
Mitsuru Matsui, Sayaka Fukuda
IPPS
2010
IEEE
15 years 3 months ago
Adapting cache partitioning algorithms to pseudo-LRU replacement policies
Abstract-- Recent studies have shown that cache partitioning is an efficient technique to improve throughput, fairness and Quality of Service (QoS) in CMP processors. The cache par...
Kamil Kedzierski, Miquel Moretó, Francisco ...
151
Voted
AFRICACRYPT
2009
Springer
15 years 2 months ago
Efficient Acceleration of Asymmetric Cryptography on Graphics Hardware
Graphics processing units (GPU) are increasingly being used for general purpose computing. We present implementations of large integer modular exponentiation, the core of public-ke...
Owen Harrison, John Waldron
TII
2010
146views Education» more  TII 2010»
14 years 11 months ago
PAUC: Power-Aware Utilization Control in Distributed Real-Time Systems
Abstract--CPU utilization control has recently been demonstrated to be an effective way of meeting end-to-end deadlines for distributed real-time systems running in unpredictable e...
Xiaorui Wang, Xing Fu, Xue Liu, Zonghua Gu