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» Processor Architectures for Ontogenesis
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ISVLSI
2007
IEEE
204views VLSI» more  ISVLSI 2007»
15 years 11 months ago
Designing Memory Subsystems Resilient to Process Variations
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance ...
Mahmoud Ben Naser, Yao Guo, Csaba Andras Moritz
130
Voted
GCC
2007
Springer
15 years 11 months ago
Adapting to Application Workflow in Processing Data Integration Queries
Data integration has evolved to provide efficient data management across distributed and heterogeneous data sources in grid environment. However, existing works in data integratio...
Yongwei Wu, Jia Liu, Gang Chen, Guangwen Yang, Bo ...
HIPC
2007
Springer
15 years 11 months ago
Optimization of Collective Communication in Intra-cell MPI
: The Cell is a heterogeneous multi-core processor, which has eight co-processors, called SPEs. The SPEs can access a common shared main memory through DMA, and each SPE can direct...
M. K. Velamati, Arun Kumar, Naresh Jayam, Ganapath...
148
Voted
ISSAC
2007
Springer
132views Mathematics» more  ISSAC 2007»
15 years 11 months ago
Adaptive loops with kaapi on multicore and grid: applications in symmetric cryptography
The parallelization of two applications in symmetric cryptography is considered: block ciphering and a new method based on random sampling for the selection of basic substitution ...
Vincent Danjean, Roland Gillard, Serge Guelton, Je...
139
Voted
ECRTS
2005
IEEE
15 years 10 months ago
A WCET-Oriented Static Branch Prediction Scheme for Real Time Systems
Branch prediction mechanisms are becoming commonplace within current generation processors. Dynamic branch predictors, albeit able to predict branches quite accurately in average,...
François Bodin, Isabelle Puaut