2700 search results - page 330 / 540 » Processor Architectures for Ontogenesis |
146
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DAC
2002
ACM
16 years 6 months ago
2002
ACM
In this paper, we present a compiler strategy to optimize data accesses in regular array-intensive applications running on embedded multiprocessor environments. Specifically, we p...
132
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DAC
2002
ACM
16 years 6 months ago
2002
ACM
In this paper, a new timing generation method is proposed for the performance analysis of embedded software. The time stamp generation of I/O accesses is crucial to performance es...
142
Voted
HPCA
2008
IEEE
16 years 5 months ago
2008
IEEE
In this paper, we propose Runahead Threads (RaT) as a valuable solution for both reducing resource contention and exploiting memory-level parallelism in Simultaneous Multithreaded...
139
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HPCA
2006
IEEE
16 years 5 months ago
2006
IEEE
In high-end processors, increasing the number of in-flight instructions can improve performance by overlapping useful processing with long-latency accesses to the main memory. Buf...
158
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ICCD
2005
IEEE
16 years 1 months ago
2005
IEEE
Presently, Architecture Description Languages (ADLs) are widely used to raise the abstraction level of the design space exploration of Application Specific Instruction-set Proces...