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» Processor Architectures for Ontogenesis
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CGO
2003
IEEE
15 years 10 months ago
Addressing Mode Selection
Many processor architectures provide a set of addressing modes in their address generation units. For example DSPs (digital signal processors) have powerful addressing modes for e...
Erik Eckstein, Bernhard Scholz
142
Voted
PPOPP
2003
ACM
15 years 10 months ago
User-controllable coherence for high performance shared memory multiprocessors
In programming high performance applications, shared address-space platforms are preferable for fine-grained computation, while distributed address-space platforms are more suita...
Collin McCurdy, Charles N. Fischer
FPL
2009
Springer
154views Hardware» more  FPL 2009»
15 years 9 months ago
Compiler assisted runtime task scheduling on a reconfigurable computer
Multitasking reconfigurable computers with one or more reconfigurable processors are being used increasingly during the past few years. One of the major challenges in such systems...
Mojtaba Sabeghi, Vlad Mihai Sima, Koen Bertels
MICRO
1999
IEEE
115views Hardware» more  MICRO 1999»
15 years 9 months ago
Fetch Directed Instruction Prefetching
Instruction supply is a crucial component of processor performance. Instruction prefetching has been proposed as a mechanism to help reduce instruction cache misses, which in turn...
Glenn Reinman, Brad Calder, Todd M. Austin
MICRO
1997
IEEE
76views Hardware» more  MICRO 1997»
15 years 9 months ago
A Framework for Balancing Control Flow and Predication
Predicated execution is a promising architectural feature for exploiting instruction-level parallelism in the presence of control flow. Compiling for predicated execution involve...
David I. August, Wen-mei W. Hwu, Scott A. Mahlke