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» Processor Architectures for Ontogenesis
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VLSID
2001
IEEE
118views VLSI» more  VLSID 2001»
16 years 2 months ago
Processor-Memory Co-Exploration driven by a Memory-Aware Architecture Description Language
Memory represents a major bottleneck in modern embedded systems. Traditionally, memory organizationsfor programmable systems assumed a fixed cache hierarchy. Withthe wideningproce...
Prabhat Mishra, Peter Grun, Nikil D. Dutt, Alexand...
ICCD
2002
IEEE
228views Hardware» more  ICCD 2002»
15 years 11 months ago
JMA: The Java-Multithreading Architecture for Embedded Processors
Embedded processors are increasingly deployed in applications requiring high performance with good real-time characteristics whilst being low power. Parallelism has to be extracte...
Panit Watcharawitch, Simon W. Moore
DSD
2005
IEEE
104views Hardware» more  DSD 2005»
15 years 7 months ago
Design of Transport Triggered Architecture Processors for Wireless Encryption
Transport Triggered Architecture (TTA) offers a costeffective trade-off between the size and performance of ASICs and the programmability of general-purpose processors. In this pa...
Panu Hämäläinen, Jari Heikkinen, Ma...
WISA
2007
Springer
15 years 8 months ago
A Compact Architecture for Montgomery Elliptic Curve Scalar Multiplication Processor
We propose a compact architecture of a Montgomery elliptic curve scalar multiplier in a projective coordinate system over GF(2m ). To minimize the gate area of the architecture, we...
Yong Ki Lee, Ingrid Verbauwhede
ICMCS
2006
IEEE
146views Multimedia» more  ICMCS 2006»
15 years 8 months ago
Collaborative Multithreading: An Open Scalable Processor Architecture for Embedded Multimedia Applications
Numerous approaches can be employed in exploiting computation power in processors such as superscalar, VLIW, SMT and multi-core on chip. In this paper, a UniCore VisoMT processor ...
Wei-Chun Ku, Shu-Hsuan Chou, Jui-Chin Chu, Chih-He...