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» Processor Architectures for Ontogenesis
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CF
2007
ACM
15 years 8 months ago
General floorplan for reversible quantum-dot cellular automata
This paper presents the Collapsed Bennett Layout, a general purpose floorplan for reversible quantum-dot cellular automata (QCA) circuits. In order to exploit the full density and...
Sarah E. Murphy, Erik DeBenedictis, Peter M. Kogge
AINA
2004
IEEE
15 years 8 months ago
Parallel PageRank Computation on a Gigabit PC Cluster
Efficient computing the PageRank scores for a large web graph is actually one of the hot issues in Web-IR community. Recent researches propose to accelerate the computation, both ...
Bundit Manaskasemsak, Arnon Rungsawang
DATE
2004
IEEE
114views Hardware» more  DATE 2004»
15 years 8 months ago
Power Aware Variable Partitioning and Instruction Scheduling for Multiple Memory Banks
Many high-end DSP processors employ both multiple memory banks and heterogeneous register files to improve performance and power consumption. The complexity of such architectures ...
Zhong Wang, Xiaobo Sharon Hu
ARC
2008
Springer
104views Hardware» more  ARC 2008»
15 years 6 months ago
PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
Frank Hannig, Holger Ruckdeschel, Hritam Dutta, J&...
EUROPAR
2008
Springer
15 years 6 months ago
Mapping Heterogeneous Distributed Applications on Clusters
Performance of distributed applications largely depends on the mapping of their components on the underlying architecture. On one mponent-based approaches provide an abstraction su...
Sylvain Jubertie, Emmanuel Melin, Jér&eacut...