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» Processor Architectures for Ontogenesis
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DSN
2004
IEEE
15 years 5 months ago
The Recursive NanoBox Processor Grid: A Reliable System Architecture for Unreliable Nanotechnology Devices
Advanced molecular nanotechnology devices are expected to have exceedingly high transient fault rates and large numbers of inherent device defects compared to conventional CMOS de...
A. J. KleinOsowski, Kevin KleinOsowski, Vijay Rang...
HPCA
2009
IEEE
16 years 2 months ago
Versatile prediction and fast estimation of Architectural Vulnerability Factor from processor performance metrics
The shrinking processor feature size, lower threshold voltage and increasing clock frequency make modern processors highly vulnerable to transient faults. Architectural Vulnerabil...
Lide Duan, Bin Li, Lu Peng
CGO
2006
IEEE
15 years 8 months ago
Constructing Virtual Architectures on a Tiled Processor
As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these ...
David Wentzlaff, Anant Agarwal
IPPS
2006
IEEE
15 years 8 months ago
Implementation of a programmable array processor architecture for approximate string matching algorithms on FPGAs
Approximate string matching problem is a common and often repeated task in information retrieval and bioinformatics. This paper proposes a generic design of a programmable array p...
Panagiotis D. Michailidis, Konstantinos G. Margari...
ISCAS
2003
IEEE
66views Hardware» more  ISCAS 2003»
15 years 7 months ago
A triple port RAM based low power commutator architecture for a pipelined FFT processor
This paper proposes a low power commutator architecture based on triple port RAMs rather than dual port RAMs or conventional FIFO.forthe radix-4 pipelined FFTprocessor implementat...
M. Hasan, Tughrul Arslan