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» Processor Architectures for Ontogenesis
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CODES
2001
IEEE
15 years 8 months ago
Retargetable compilation for low power
Most research to date on energy minimization in DSP processors has focuses on hardware solution. This paper examines the software-based factors affecting performance and energy co...
Wen-Tsong Shiue
142
Voted
MVA
1994
113views Computer Vision» more  MVA 1994»
15 years 6 months ago
A Modified Simulation Environment for Reconfigurable Multicomputer Systems in Digital Image Processing Applications
In our work we improve the EPPI programming environment, which was made in the University of Castilla - la Mancha one year ago. EPPI is a tool for simulating parallel algorithms t...
Francisco J. Quiles, Antonio Jose Garrido del Solo
ASPLOS
2006
ACM
15 years 10 months ago
Improving software security via runtime instruction-level taint checking
Current taint checking architectures monitor tainted data usage mainly with control transfer instructions. An alarm is raised once the program counter becomes tainted. However, su...
Jingfei Kong, Cliff Changchun Zou, Huiyang Zhou
DAC
2002
ACM
16 years 5 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik
HPCA
2008
IEEE
16 years 5 months ago
Performance-aware speculation control using wrong path usefulness prediction
Fetch gating mechanisms have been proposed to gate the processor pipeline to reduce the wasted energy consumption due to wrongpath (i.e. mis-speculated) instructions. These scheme...
Chang Joo Lee, Hyesoon Kim, Onur Mutlu, Yale N. Pa...