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» Processor Architectures for Ontogenesis
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CODES
2009
IEEE
15 years 9 months ago
Native MPSoC co-simulation environment for software performance estimation
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
Patrice Gerin, Mian Muhammad Hamayun, Fréd&...
HPCA
1998
IEEE
15 years 8 months ago
FPGA Based Custom Computing Machines for Irregular Problems
Over the past few years there has been increased interest in building custom computing machines (CCMs) as a way of achieving very high performance on specific problems. The advent...
David Abramson, Paul Logothetis, Adam Postula, Mar...
145
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VLDB
1992
ACM
151views Database» more  VLDB 1992»
15 years 8 months ago
Parallelism in a Main-Memory DBMS: The Performance of PRISMA/DB
This paper evaluates the performance of the parallel, main-memory DBMS, PRISMA/DB. First, an architecture for parallel query execution is presented. A performance model for the ex...
Annita N. Wilschut, Jan Flokstra, Peter M. G. Aper...
CASES
2006
ACM
15 years 8 months ago
Improving the performance and power efficiency of shared helpers in CMPs
Technology scaling trends have forced designers to consider alternatives to deeply pipelining aggressive cores with large amounts of performance accelerating hardware. One alterna...
Anahita Shayesteh, Glenn Reinman, Norman P. Jouppi...
EDCC
2006
Springer
15 years 8 months ago
SEU Mitigation Techniques for Microprocessor Control Logic
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
T. S. Ganesh, Viswanathan Subramanian, Arun K. Som...