2700 search results - page 364 / 540 » Processor Architectures for Ontogenesis |
116
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ITICSE
2010
ACM
15 years 9 months ago
2010
ACM
This paper introduces the SOM (Simple Object Machine) family of virtual machine (VM) implementations, a collection of VMs for the same Smalltalk dialect addressing students at di�...
140
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ICCD
1999
IEEE
15 years 8 months ago
1999
IEEE
Current trends in DRAM memory chip fabrication have led many researchers to propose \intelligent memory" architectures that integrate microprocessors or logic with memory. Su...
163
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ISHPC
1999
Springer
15 years 8 months ago
1999
Springer
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
170
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LCTRTS
1999
Springer
15 years 8 months ago
1999
Springer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
136
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RTAS
1997
IEEE
15 years 8 months ago
1997
IEEE
3rd IEEE Real-time Technology and Applications Symposium (RTAS), June 1997 in Montreal, Canada Cache-partitioning techniques have been invented to make modern processors with an e...