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» Processor Architectures for Ontogenesis
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131
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DAC
2005
ACM
15 years 6 months ago
Dynamic reconfiguration with binary translation: breaking the ILP barrier with software compatibility
In this paper we present the impact of dynamically translating any sequence of instructions into combinational logic. The proposed approach combines a reconfigurable architecture ...
Antonio Carlos Schneider Beck, Luigi Carro
125
Voted
ASAP
2007
IEEE
134views Hardware» more  ASAP 2007»
15 years 6 months ago
Methodology and Toolset for ASIP Design and Development Targeting Cryptography-Based Applications
Network processors utilizing general-purpose instruction-set architectures (ISA) limit network throughput due to latency incurred from cryptography and hashing applications (AES, ...
David Montgomery, Ali Akoglu
TREC
2007
15 years 5 months ago
Exegy at TREC 2007 Million Query Track
Exegy’s submission for the TREC 2007 million query track consisted of results obtained by running the queries against the raw data, i.e., the data was not indexed. The hardwarea...
Naveen Singla, Ronald S. Indeck
JCP
2006
112views more  JCP 2006»
15 years 4 months ago
Mobile Agent Based Wireless Sensor Networks
Recently, mobile agents have been proposed for efficient data dissemination in sensor networks. In the traditional client/server-based computing architecture, data at multiple sour...
Min Chen, Taekyoung Kwon, Yong Yuan, Victor C. M. ...
141
Voted
DAC
2009
ACM
16 years 5 months ago
An adaptive scheduling and voltage/frequency selection algorithm for real-time energy harvesting systems
? In this paper we propose an adaptive scheduling and voltage/frequency selection algorithm which targets at energy harvesting systems. The proposed algorithm adjusts the processor...
Shaobo Liu, Qing Wu, Qinru Qiu