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» Processor Architectures for Ontogenesis
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CAL
2006
15 years 4 months ago
Performance modeling using Monte Carlo simulation
Abstract-- Cycle accurate simulation has long been the primary tool for micro-architecture design and evaluation. Though accurate, the slow speed often imposes constraints on the e...
Ram Srinivasan, Jeanine Cook, Olaf M. Lubeck
JCP
2007
127views more  JCP 2007»
15 years 4 months ago
Comparison of Simple Power Analysis Attack Resistant Algorithms for an Elliptic Curve Cryptosystem
Abstract— Side channel attacks such as Simple Power Analysis(SPA) attacks provide a new challenge for securing algorithms from an attacker. Algorithms for elliptic curve point sc...
Andrew Byrne, Nicolas Meloni, Arnaud Tisserand, Em...
COMCOM
2004
95views more  COMCOM 2004»
15 years 4 months ago
A distributed middleware infrastructure for personalized services
In this paper, we present an overview of extensible Retrieval, Annotation and Caching Engine (eRACE), a modular and distributed intermediary infrastructure that collects informati...
Marios D. Dikaiakos, Demetrios Zeinalipour-Yazti
IWOMP
2007
Springer
15 years 10 months ago
Supporting OpenMP on Cell
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...
NOCS
2007
IEEE
15 years 10 months ago
Transaction-Based Communication-Centric Debug
Abstract— The behaviour of systems on chip (SOC) is complex because they contain multiple processors that interact through concurrent interconnects, such as networks on chip (NOC...
Kees Goossens, Bart Vermeulen, Remco van Steeden, ...