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» Processor Architectures for Ontogenesis
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DATE
2005
IEEE
154views Hardware» more  DATE 2005»
15 years 10 months ago
Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring
— Security is emerging as an important concern in embedded system design. The security of embedded systems is often compromised due to vulnerabilities in “trusted” software t...
Divya Arora, Srivaths Ravi, Anand Raghunathan, Nir...
EGH
2004
Springer
15 years 10 months ago
A programmable vertex shader with fixed-point SIMD datapath for low power wireless applications
The real time 3D graphics becomes one of the attractive applications for 3G wireless terminals although their battery lifetime and memory bandwidth limit the system resources for ...
Ju-Ho Sohn, Ramchan Woo, Hoi-Jun Yoo
MICRO
2003
IEEE
125views Hardware» more  MICRO 2003»
15 years 9 months ago
WaveScalar
Silicon technology will continue to provide an exponential increase in the availability of raw transistors. Effectively translating this resource into application performance, how...
Steven Swanson, Ken Michelson, Andrew Schwerin, Ma...
ICIP
1994
IEEE
16 years 5 months ago
Full Custom VLSI Implementation of High-Speed 2-D DCT/IDCT Chip
In this paper we present a full-custom VLSI design of highspeed 2-D DCT/IDCT processor based on the new class of time-recursive algorithms and architectures which has never been i...
Vishnu Srinivasan, K. J. Ray Liu
DAC
2008
ACM
16 years 5 months ago
A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip
In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to faulttolerant, Massively Parallel Multi-Processors Systems on Chip (MP...
Zhen Zhang, Alain Greiner, Sami Taktak