2700 search results - page 412 / 540 » Processor Architectures for Ontogenesis |
148
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HPDC
1997
IEEE
15 years 8 months ago
1997
IEEE
This paper presents a novel networking architecture designed for communication intensive parallel applications running on clusters of workstations (COWs) connected by highspeed ne...
109
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DAC
2008
ACM
2008
ACM
An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing
16 years 5 months ago
Single-chip parallel processing requires high bandwidth between processors and on-chip memory modules. A recently proposed Mesh-of-Trees (MoT) network provides high throughput and...
131
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DAC
2007
ACM
16 years 5 months ago
2007
ACM
Multicore has shown significant performance and power advantages over single cores in commercial systems with a 2-4 cores. Applying a corollary of Moore's Law for multicore, ...
135
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DAC
2007
ACM
16 years 5 months ago
2007
ACM
Pattern matching is essential to a wide range of applications such as network intrusion detection, virus scanning, etc. Pattern matching algorithms normally rely on state machines...
127
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DAC
2000
ACM
16 years 5 months ago
2000
ACM
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...