2700 search results - page 421 / 540 » Processor Architectures for Ontogenesis |
147
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MICRO
2003
IEEE
15 years 9 months ago
2003
IEEE
High-performance caches statically pull up the bitlines in all cache subarrays to optimize cache access latency. Unfortunately, such an architecture results in a significant wast...
141
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IPPS
2002
IEEE
15 years 9 months ago
2002
IEEE
Three dimensional triangle mesh is the dominant representation used in parallel rendering of 3D geometric models. However, explosive growth in the complexity of the mesh-based 3D ...
131
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ISSS
2002
IEEE
15 years 9 months ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
142
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HPCA
1999
IEEE
15 years 8 months ago
1999
IEEE
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
116
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ISCA
1999
IEEE
15 years 8 months ago
1999
IEEE
Value Prediction is a relatively new technique to increase instruction-level parallelism by breaking true data dependence chains. A value prediction architecture produces values, ...