Sciweavers

2700 search results - page 423 / 540
» Processor Architectures for Ontogenesis
Sort
View
ICCAD
1994
IEEE
105views Hardware» more  ICCAD 1994»
15 years 8 months ago
Register assignment through resource classification for ASIP microcode generation
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...
Clifford Liem, Trevor C. May, Pierre G. Paulin
ISCA
1994
IEEE
123views Hardware» more  ISCA 1994»
15 years 8 months ago
Software-Extended Coherent Shared Memory: Performance and Cost
This paper evaluates the tradeoffs involved in the design of the software-extended memory system of Alewife, a multiprocessor architecturethat implements coherentsharedmemorythrou...
David Chaiken, Anant Agarwal
MICRO
1994
IEEE
123views Hardware» more  MICRO 1994»
15 years 8 months ago
The effects of predicated execution on branch prediction
High performance architectures have always had to deal with the performance-limiting impact of branch operations. Microprocessor designs are going to have to deal with this proble...
Gary S. Tyson
ASPLOS
1994
ACM
15 years 8 months ago
Interleaving: A Multithreading Technique Targeting Multiprocessors and Workstations
There is an increasing trend to use commodity microprocessors as the compute engines in large-scale multiprocessors. However, given that the majority of the microprocessors are so...
James Laudon, Anoop Gupta, Mark Horowitz
DAC
1989
ACM
15 years 8 months ago
A New Approach to the Rectilinear Steiner Tree Problem
: We discuss a new approach to constructing the rectilinear Steiner tree (RST) of a given set of points in the plane, starting from a minimum spanning tree (MST). The main idea in ...
Jan-Ming Ho, Gopalakrishnan Vijayan, C. K. Wong