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ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
15 years 5 months ago
Re-architecting DRAM memory systems with monolithically integrated silicon photonics
The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding increase in memory bandwidth. Projected scaling of el...
Scott Beamer, Chen Sun, Yong-Jin Kwon, Ajay Joshi,...
CLUSTER
2002
IEEE
15 years 4 months ago
Scalable Resource Management in High Performance Computers
Clusters of workstations have emerged as an important platform for building cost-effective, scalable, and highlyavailable computers. Although many hardware solutions are available...
Eitan Frachtenberg, Fabrizio Petrini, Juan Fern&aa...
ICS
2009
Tsinghua U.
15 years 4 months ago
A comprehensive power-performance model for NoCs with multi-flit channel buffers
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a cruc...
Mohammad Arjomand, Hamid Sarbazi-Azad
HCW
1998
IEEE
15 years 4 months ago
Implementing Distributed Synthetic Forces Simulations in Metacomputing Environments
A distributed, parallel implementation of the widely used Modular Semi-Automated Forces ModSAF Distributed Interactive Simulation DIS is presented, with Scalable Parallel Processo...
Sharon Brunett, Dan Davis, Thomas Gottschalk, Paul...
DSN
2007
IEEE
15 years 3 months ago
Augmenting Branch Predictor to Secure Program Execution
Although there are various ways to exploit software vulnerabilities for malicious attacks, the attacks always result in unexpected behavior in program execution, deviating from wh...
Yixin Shi, Gyungho Lee