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» Processor Architectures for Ontogenesis
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VLSID
2008
IEEE
142views VLSI» more  VLSID 2008»
16 years 8 days ago
Temperature and Process Variations Aware Power Gating of Functional Units
Technology scaling has resulted in an exponential increase in the leakage power as well as the variations in leakage power of fabricated chips. Functional units (FUs), like Intege...
Deepa Kannan, Aviral Shrivastava, Vipin Mohan, Sar...
VLSID
2007
IEEE
154views VLSI» more  VLSID 2007»
16 years 8 days ago
Application Specific Datapath Extension with Distributed I/O Functional Units
Performance of an application can be improved through augmenting the processor with Application specific Functional Units (AFUs). Usually a cluster of operations identified from th...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
VLSID
2002
IEEE
90views VLSI» more  VLSID 2002»
16 years 8 days ago
Software-Only Bus Encoding Techniques for an Embedded System
Microprocessors with built-in Liquid Crystal Device (LCD) controllers and equipped with Flash ROM are common in mobile computing applications. In the first part of the paper, a so...
Wei-Chung Cheng, Jian-Lin Liang, Massoud Pedram
HPCA
2008
IEEE
16 years 7 days ago
FlexiTaint: A programmable accelerator for dynamic taint propagation
This paper presents FlexiTaint, a hardware accelerator for dynamic taint propagation. FlexiTaint is implemented as an in-order addition to the back-end of the processor pipeline, ...
Guru Venkataramani, Ioannis Doudalis, Yan Solihin,...
HPCA
2008
IEEE
16 years 7 days ago
Serializing instructions in system-intensive workloads: Amdahl's Law strikes again
Serializing instructions (SIs), such as writes to control registers, have many complex dependencies, and are difficult to execute out-of-order (OoO). To avoid unnecessary complexi...
Philip M. Wells, Gurindar S. Sohi