2700 search results - page 463 / 540 » Processor Architectures for Ontogenesis |
ISORC
2008
IEEE
15 years 6 months ago
2008
IEEE
Java, as a safe and platform independent language, avoids access to low-level I/O devices or direct memory access. In standard Java, low-level I/O it not a concern; it is handled ...
109
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ISPASS
2008
IEEE
15 years 6 months ago
2008
IEEE
This paper characterizes the impact that the use of UDP versus TCP has on the performance and scalability of the OpenSER SIP proxy server. The Session Initiation Protocol (SIP) is...
101
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SBACPAD
2008
IEEE
15 years 6 months ago
2008
IEEE
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
123
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APCSAC
2007
IEEE
15 years 6 months ago
2007
IEEE
The majority of currently available dynamic branch predictors base their prediction accuracy on the previous k branch outcomes. Such predictors sustain high prediction accuracy but...
CGO
2007
IEEE
15 years 6 months ago
2007
IEEE
The increasing complexity of hardware features for recent processors makes high performance code generation very challenging. In particular, several optimization targets have to b...