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MICRO
2006
IEEE
155views Hardware» more  MICRO 2006»
15 years 5 months ago
In-Network Cache Coherence
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
Noel Eisley, Li-Shiuan Peh, Li Shang
SI3D
2006
ACM
15 years 5 months ago
Jump flooding in GPU with applications to Voronoi diagram and distance transform
This paper studies jump flooding as an algorithmic paradigm in the general purpose computation with GPU. As an example application of jump flooding, the paper discusses a constant...
Guodong Rong, Tiow Seng Tan
APCSAC
2005
IEEE
15 years 5 months ago
Irregular Redistribution Scheduling by Partitioning Messages
Abstract. Dynamic data redistribution enhances data locality and improves algorithm performance for numerous scientific problems on distributed memory multi-computers systems. Prev...
Chang Yu, Ching-Hsien Hsu, Kun-Ming Yu, Chiu-Kuo L...
ASAP
2005
IEEE
96views Hardware» more  ASAP 2005»
15 years 5 months ago
On-Chip Lookup Tables for Fast Symmetric-Key Encryption
On public communication networks such as the Internet, data confidentiality can be provided by symmetric-key ciphers. One of the most common operations used in symmetric-key ciphe...
A. Murat Fiskiran, Ruby B. Lee
CODES
2005
IEEE
15 years 5 months ago
A power estimation methodology for systemC transaction level models
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
Nagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan