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» Processor Architectures for Ontogenesis
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CASES
2007
ACM
15 years 3 months ago
An integrated ARM and multi-core DSP simulator
In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run co-operatively with a multi-core DSP simulator on...
Sharad Singhai, MingYung Ko, Sanjay Jinturkar, May...
CASES
2007
ACM
15 years 3 months ago
Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms
Many MPSoC applications are loop-intensive and amenable to automatic parallelization with suitable compiler support. One of the key components of any compiler-parallelized code is...
Andrea Marongiu, Luca Benini, Mahmut T. Kandemir
ISSTA
2010
ACM
15 years 3 months ago
Learning from 6, 000 projects: lightweight cross-project anomaly detection
Real production code contains lots of knowledge—on the domain, on the architecture, and on the environment. How can we leverage this knowledge in new projects? Using a novel lig...
Natalie Gruska, Andrzej Wasylkowski, Andreas Zelle...
FPL
2007
Springer
99views Hardware» more  FPL 2007»
15 years 3 months ago
Disjoint Pattern Enumeration for Custom Instructions Identification
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. These custom instructions are selected through an analys...
Pan Yu, Tulika Mitra
FPL
2007
Springer
97views Hardware» more  FPL 2007»
15 years 3 months ago
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee