2700 search results - page 532 / 540 » Processor Architectures for Ontogenesis |
98
Voted
FCCM
2002
IEEE
15 years 2 months ago
2002
IEEE
The paper presents a Design Space Exploration (DSE) experiment which has been carried out in order to determine the optimum FPGA–based Variable-Length Decoder (VLD) computing re...
ISCA
2002
IEEE
15 years 2 months ago
2002
IEEE
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
106
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SC
2009
ACM
15 years 2 months ago
2009
ACM
It has been shown that the sparse grid combination technique can be a practical tool to solve high dimensional PDEs arising in multidimensional option pricing problems in finance...
EUROPAR
2009
Springer
15 years 2 months ago
2009
Springer
Abstract. With the prevalence of multi-core processors and cloud computing, the server consolidation using virtualization has increasingly expanded its territory, and the degree of...
88
Voted
FPL
2009
Springer
15 years 2 months ago
2009
Springer
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...