Sciweavers

2700 search results - page 539 / 540
» Processor Architectures for Ontogenesis
Sort
View
MVA
1992
188views Computer Vision» more  MVA 1992»
14 years 10 months ago
The Programmable and Configurable Low Level Vision Unit of the HERMIA Machine
In this work the Low Level Vision Unit (LLVU) of the Heterogeneous and Reconfigurable Machine for Image Analysis (HERMIA) is described. The LLVU consists of the innovative integra...
Gaetano Gerardi, Giancarlo Parodi
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
14 years 9 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
BMCBI
2008
218views more  BMCBI 2008»
14 years 9 months ago
LOSITAN: A workbench to detect molecular adaptation based on a Fst-outlier method
Background: Testing for selection is becoming one of the most important steps in the analysis of multilocus population genetics data sets. Existing applications are difficult to u...
Tiago Antao, Ana Lopes, Ricardo J. Lopes, Albano B...
NETWORK
2008
96views more  NETWORK 2008»
14 years 9 months ago
Enabling rapid wireless system composition through layer-2 discovery
Although small mobile computers have processors whose capabilities are increasing, often they still are resource constrained in terms of performing many common computing tasks. Co...
Shivani Sud, Roy Want, Trevor Pering, Barbara Rosa...
87
Voted
TECS
2008
122views more  TECS 2008»
14 years 9 months ago
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling
tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...
Gunar Schirner, Rainer Dömer