142 search results - page 23 / 29 » Processor Memory Co-Exploration on Multiple Abstraction Leve... |
75
Voted
RT
1999
Springer
15 years 1 months ago
1999
Springer
Abstract. An algorithm for simulating diffuse interreflection in complex three dimensional scenes is described. It combines techniques from hierarchical radiosity and multiresolut...
CHES
2009
Springer
15 years 10 months ago
2009
Springer
Abstract. This paper presents a design-space exploration of an applicationspecific instruction-set processor (ASIP) for the computation of various cryptographic pairings over Barre...
BTW
2009
Springer
15 years 4 months ago
2009
Springer
Abstract: Green computing or energy saving when processing information is primarily considered a task of processor development. We, however, advocate that a holistic approach is ne...
91
Voted
IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
Abstract--The lag of parallel programming models and languages behind the advance of heterogeneous many-core processors has left a gap between the computational capability of moder...
IEEESP
2006
14 years 9 months ago
2006
t a single security abstraction layer, but rather is a roblem spanning multiple abstraction levels. We use an embedded biometric authentication device to demonstratethenecessityofa...