142 search results - page 24 / 29 » Processor Memory Co-Exploration on Multiple Abstraction Leve... |
IPPS
1998
IEEE
15 years 1 months ago
1998
IEEE
Abstract. LAPACK90 is a set of LAPACK90 subroutines which interfaces FORTRAN90 with LAPACK. All LAPACK driver subroutines including expert drivers and some LAPACK computationals ha...
HPCA
2003
IEEE
15 years 9 months ago
2003
IEEE
Although caches for decades have been the backbone of the memory system, the speed gap between CPU and main memory suggests their augmentation with prefetching mechanisms. Recentl...
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SASP
2008
IEEE
15 years 3 months ago
2008
IEEE
Abstract—Customised processor performance generally increases as additional custom instructions are added. However, performance is not the only metric that modern systems must ta...
ICA3PP
2009
Springer
15 years 2 months ago
2009
Springer
Abstract. Practical implementations of atomically consistent read/write memory service are important building blocks for higher level applications. This is especially true when dat...
CCGRID
2003
IEEE
15 years 2 months ago
2003
IEEE
I/O bottlenecks are already a problem in many largescale applications that manipulate huge datasets. This problem is expected to get worse as applications get larger, and the I/O ...