142 search results - page 6 / 29 » Processor Memory Co-Exploration on Multiple Abstraction Leve... |
HICSS
1995
IEEE
15 years 1 months ago
1995
IEEE
Abstract. We reexamine the limits of parallelism available in programs, using runtime reconstruction of program data-flow graphs. While limits of parallelism have been examined in...
CODES
2004
IEEE
15 years 1 months ago
2004
IEEE
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
In this Paper, we describe the various low power techniques for mobile application SoCs based on the integrated platform "UniPhier". To minimize SoC power dissipation, h...
HPCA
1998
IEEE
15 years 1 months ago
1998
IEEE
The explosive growth in the performance of microprocessors and networks has created a new opportunity to reduce the latency of fine-grain communication. Microprocessor clock speed...
98
Voted
JPDC
2010
14 years 8 months ago
2010
—We present the design and implementation of a parallel exact inference algorithm on the Cell Broadband Engine (Cell BE). Exact inference is a key problem in exploring probabilis...