378 search results - page 17 / 76 » Processor Modeling for Hardware Software Codesign |
144
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DSD
2011
IEEE
14 years 6 days ago
2011
IEEE
Abstract—We present a new low-level interfacing scheme for connecting custom accelerators to processors that tolerates latencies that usually occur when accessing hardware accele...
94
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FPL
2004
Springer
15 years 5 months ago
2004
Springer
Several implementations of Artificial Neural Networks have been reported in scientific papers. Nevertheless, these implementations do not allow the direct use of off-line trained n...
85
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CODES
2005
IEEE
15 years 6 months ago
2005
IEEE
In this paper, we present a new architectural concept for network processors called FlexPath NP. The central idea behind FlexPath NP is to systematically map network processor (NP...
CODES
2005
IEEE
15 years 6 months ago
2005
IEEE
The ability to continue increasing processor frequency and single thread performance is being severely limited by exponential increases in leakage and active power. To continue to...
89
Voted
CODES
2006
IEEE
15 years 6 months ago
2006
IEEE
In deep sub-micron technology, the crosstalk effect between adjacent wires has become an important issue, especially between long on-chip buses. This effect leads to the increas...