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» Processor Modeling for Hardware Software Codesign
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CODES
2003
IEEE
15 years 5 months ago
Transaction level modeling: an overview
Recently, the transaction-level modeling has been widely referred to in system-level design community. However, the transaction-level models(TLMs) are not well defined and the us...
Lukai Cai, Daniel Gajski
118
Voted
FCCM
2006
IEEE
201views VLSI» more  FCCM 2006»
15 years 4 months ago
Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers
With advances in reconfigurable hardware, especially field-programmable gate arrays (FPGAs), it has become possible to use reconfigurable hardware to accelerate complex applicatio...
Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor...
92
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GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
15 years 6 months ago
SOFTENIT: a methodology for boosting the software content of system-on-chip designs
Embedded software is a preferred choice for implementing system functionality in modern System-on-Chip (SoC) designs, due to the high flexibility, and lower engineering costs pro...
Abhishek Mitra, Marcello Lajolo, Kanishka Lahiri
CODES
2001
IEEE
15 years 4 months ago
Modeling and evaluation of hardware/software designs
We introduce the foundation of a system modeling environment targeted at capturing the anticipated interactions of hardware and software behaviors -- not just their co-execution. ...
Neal K. Tibrewala, JoAnn M. Paul, Donald E. Thomas
CODES
2005
IEEE
15 years 6 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...