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» Processor Modeling for Hardware Software Codesign
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CODES
2005
IEEE
15 years 6 months ago
Retargetable generation of TLM bus interfaces for MP-SoC platforms
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
Andreas Wieferink, Rainer Leupers, Gerd Ascheid, H...
115
Voted
ICPADS
2006
IEEE
15 years 6 months ago
Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems
—Recently, high-end reconfigurable computing systems that employ Field-Programmable Gate Arrays (FPGAs) as hardware accelerators for general-purpose processors have been built. T...
Ling Zhuo, Viktor K. Prasanna
102
Voted
CODES
2007
IEEE
15 years 6 months ago
Embedded software development on top of transaction-level models
Early embedded SW development with transaction-level models has been broadly promoted to improve SoC design productivity. But the proposed APIs only provide low-level read/write o...
Wolfgang Klingauf, Robert Günzel, Christian S...
100
Voted
MICRO
2011
IEEE
193views Hardware» more  MICRO 2011»
14 years 4 months ago
Voltage Noise in Production Processors
Abstract—Parameter variations have become a dominant challenge in microprocessor design. Voltage variation is especially daunting because it happens so rapidly. We measure and ch...
Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Si...
95
Voted
DATE
2010
IEEE
168views Hardware» more  DATE 2010»
15 years 4 months ago
Verifying UML/OCL models using Boolean satisfiability
Abstract--Nowadays, modeling languages like UML are essential in the design of complex software systems and also start to enter the domain of hardware and hardware/software codesig...
Mathias Soeken, Robert Wille, Mirco Kuhlmann, Mart...