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» Processor Modeling for Hardware Software Codesign
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CODES
2008
IEEE
15 years 7 months ago
Online adaptive utilization control for real-time embedded multiprocessor systems
To provide Quality of Service (QoS) guarantees in open and unpredictable environments, the utilization control problem is defined to keep the processor utilization at the schedula...
Jianguo Yao, Xue Liu, Mingxuan Yuan, Zonghua Gu
206
Voted
MICRO
2006
IEEE
191views Hardware» more  MICRO 2006»
15 years 12 days ago
CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs
Since processor performance scalability will now mostly be achieved through thread-level parallelism, there is a strong incentive to parallelize a broad range of applications, inc...
Pierre Palatin, Yves Lhuillier, Olivier Temam
ISCAS
2007
IEEE
101views Hardware» more  ISCAS 2007»
15 years 6 months ago
Automated HDL Generation: Comparative Evaluation
— Reconfigurable computing (RC) systems, coupling general purpose processor with reconfigurable components, offer a lot of advantages. Nevertheless, currently a designer needs ...
Yana Yankova, Koen Bertels, Stamatis Vassiliadis, ...
95
Voted
DATE
2000
IEEE
105views Hardware» more  DATE 2000»
15 years 4 months ago
System Synthesis for Multiprocessor Embedded Applications
This paper presents the system synthesis techniques available in S3 E2 S, a CAD environment for the specification, simulation, and synthesis of embedded electronic systems that ca...
Luigi Carro, Márcio Eduardo Kreutz, Fl&aacu...
CODES
2003
IEEE
15 years 5 months ago
Virtual synchronization technique with OS modeling for fast and time-accurate cosimulation
Hardware/Software cosimulation is the key process to shorten the design turn around time. We have proposed a novel technique, called virtual synchronization, for fast and time acc...
Youngmin Yi, Dohyung Kim, Soonhoi Ha